\hypertarget{structscif__gclk__opt__t}{
\section{scif\-\_\-gclk\-\_\-opt\-\_\-t \-Struct \-Reference}
\label{structscif__gclk__opt__t}\index{scif\-\_\-gclk\-\_\-opt\-\_\-t@{scif\-\_\-gclk\-\_\-opt\-\_\-t}}
}


\-Generic clock generation settings.  




{\ttfamily \#include $<$scif\-\_\-uc3c.\-h$>$}

\subsection*{\-Data \-Fields}
\begin{DoxyCompactItemize}
\item 
\hyperlink{scif__uc3c_8h_a2a2e11f06784f5133dd912e595fde6f0}{scif\-\_\-gcctrl\-\_\-oscsel\-\_\-t} \hyperlink{structscif__gclk__opt__t_a7f093e4c255de54d9ab438356372fdf1}{clock\-\_\-source}
\begin{DoxyCompactList}\small\item\em \-The input clock source to use for the generic clock. \end{DoxyCompactList}\item 
unsigned int \hyperlink{structscif__gclk__opt__t_ab737b01b420ea1a5df2fb2de4efe6b3e}{divider}
\begin{DoxyCompactList}\small\item\em \-The division factor to apply to the clock src. \end{DoxyCompactList}\item 
unsigned int \hyperlink{structscif__gclk__opt__t_a9f55e1a053f9b01014ba215e52e1f2d8}{diven}
\begin{DoxyCompactList}\small\item\em \-Enable/disable the generic clock divisor. \end{DoxyCompactList}\end{DoxyCompactItemize}


\subsection{\-Detailed \-Description}
\-Generic clock generation settings. 

\subsection{\-Field \-Documentation}
\hypertarget{structscif__gclk__opt__t_a7f093e4c255de54d9ab438356372fdf1}{
\index{scif\-\_\-gclk\-\_\-opt\-\_\-t@{scif\-\_\-gclk\-\_\-opt\-\_\-t}!clock\-\_\-source@{clock\-\_\-source}}
\index{clock\-\_\-source@{clock\-\_\-source}!scif_gclk_opt_t@{scif\-\_\-gclk\-\_\-opt\-\_\-t}}
\subsubsection[{clock\-\_\-source}]{\setlength{\rightskip}{0pt plus 5cm}{\bf scif\-\_\-gcctrl\-\_\-oscsel\-\_\-t} {\bf scif\-\_\-gclk\-\_\-opt\-\_\-t\-::clock\-\_\-source}}}
\label{structscif__gclk__opt__t_a7f093e4c255de54d9ab438356372fdf1}


\-The input clock source to use for the generic clock. 

\hypertarget{structscif__gclk__opt__t_a9f55e1a053f9b01014ba215e52e1f2d8}{
\index{scif\-\_\-gclk\-\_\-opt\-\_\-t@{scif\-\_\-gclk\-\_\-opt\-\_\-t}!diven@{diven}}
\index{diven@{diven}!scif_gclk_opt_t@{scif\-\_\-gclk\-\_\-opt\-\_\-t}}
\subsubsection[{diven}]{\setlength{\rightskip}{0pt plus 5cm}unsigned int {\bf scif\-\_\-gclk\-\_\-opt\-\_\-t\-::diven}}}
\label{structscif__gclk__opt__t_a9f55e1a053f9b01014ba215e52e1f2d8}


\-Enable/disable the generic clock divisor. 

\hypertarget{structscif__gclk__opt__t_ab737b01b420ea1a5df2fb2de4efe6b3e}{
\index{scif\-\_\-gclk\-\_\-opt\-\_\-t@{scif\-\_\-gclk\-\_\-opt\-\_\-t}!divider@{divider}}
\index{divider@{divider}!scif_gclk_opt_t@{scif\-\_\-gclk\-\_\-opt\-\_\-t}}
\subsubsection[{divider}]{\setlength{\rightskip}{0pt plus 5cm}unsigned int {\bf scif\-\_\-gclk\-\_\-opt\-\_\-t\-::divider}}}
\label{structscif__gclk__opt__t_ab737b01b420ea1a5df2fb2de4efe6b3e}


\-The division factor to apply to the clock src. 



\-The documentation for this struct was generated from the following file\-:\begin{DoxyCompactItemize}
\item 
\hyperlink{scif__uc3c_8h}{scif\-\_\-uc3c.\-h}\end{DoxyCompactItemize}
